1. Field of the Invention
The present invention relates generally to integrated circuits, and more particularly to packaging integrated circuits. Still more particularly, the present invention relates to a leadframe for attaching a die thereon for use in an integrated circuit.
2. Description of the Prior Art
The process of packaging integrated circuits includes the step of attaching dies to leadframes. A leadframe includes, among other components, paddles for attaching the dies thereon. The dies can be attached to the paddles with an epoxy adhesive or an eutectic layer.
Typically, the paddles are formed as a single support pad on which the dies are attached. In order to supply the various circuits within the die with a supply voltage, it is necessary to bus the power supply voltage from a bond pad to all parts of the die. As known in the art, wide signal lines are required to bus a power supply voltage from one end of a die to the other. The wide signal lines reduce the amount of available space on the integrated circuit. This reduction of available space is a problem as the density of integrated circuits continues to increase.
Another problem caused by the wide signal lines relates to their resistance, parasitic capacitance and inductance. With integrated circuits operating at high speeds and lower supply voltages, the signal lines used to bus power supplies need to be proportionally larger to insure the proper supply voltage is accessible across the die. This exacerbates the problem of reduced available space in the integrated circuit.
Therefore, it would be desirable to provide a leadframe structure which minimizes the bussing of supply voltages across a die. It is also desirable that such a leadframe structure not significantly increase the complexity of the packaging process of integrated circuits.